1. Field of the Disclosure
The present disclosure relates generally to an apparatus for and a method of fine capacitance tuning, and more particularly, to an apparatus for and a method of fine capacitance tuning for a high resolution digitally controlled oscillator.
2. Description of the Related Art
The frequency output of a digitally controlled oscillator (DCO) is determined by an inductor-capacitor tank circuit. Variable capacitive elements are used to control the frequency. Frequency tuning typically involves coarse tuning capacitors and fine tuning capacitors, where coarse tuning capacitors are used to mitigate process, voltage, and temperature (PVT) variations, and where fine tuning capacitors are used to generate an accurate frequency, where dithering may be used for fine tuning.
In all-digital phase-locked loops (ADPLLs), quantization noise introduced by frequency discretization in a DCO can affect performance in terms of out-of-band phase noise. In particular, quantization noise must be much lower than intrinsic oscillator phase noise.
Very fine frequency resolution is one method of reducing quantization noise. In addition, target frequency resolution for a wireless application is so small that it is challenging to transform a varactor-based voltage controlled oscillator (VCO) to a DCO. For example, in the design of a DCO for global system for mobile communications (GSM) applications, the target frequency resolution of a few kilohertz (KHz) with respect to a tuning range of several hundred megahertz (MHz) around the carrier (e.g., 900/1800 MHz in GSM) results in capacitive elements of the order of atto-Farads, which may not be easily integrated. Thus, fine frequency steps in the range of 10 KHz are required to reduce quantization noise.
In addition, switch parasitic and PVT variation is typically larger than the required fine frequency (e.g. capacitance) steps.
Furthermore, if a parasitic capacitance at an output of a DCO is larger than a capacitance step then the frequency tuning range of the DCO is reduced.
In the related art, converting analog control of a varactor to digital control involves additional digital circuitry.
Implementing a metal-insulator-metal (MIM) capacitor or a variable capacitor in atto-Farads is either impossible or impractical due to dimension limits on capacitors in a manufacturing process.
Connecting capacitors in series to reduce capacitance step size typically involves a large fixed capacitor at the output.
A capacitive network is used to change the step size. The effective capacitance of the capacitive network is changed by changing the capacitance of a capacitor within the capacitive network. The amount by which the effective capacitance changes due to a change in the capacitance of a capacitor within the capacitive network is commonly referred to as a shrink factor. The shrink factor determines the minimum step size of the capacitive network. Thus, the smaller the change in effective capacitance that can be achieved by a change in capacitance of a capacitor within the capacitive network, the higher the frequency resolution of the DCO.
A capacitive network that merely includes capacitors in serial and parallel combinations has an effective capacitance that includes terms that are sums and/or products of the capacitors within the capacitive network, which does not achieve the smallest possible change in effective capacitance, and does not achieve the highest frequency resolution of a DCO.